Exercise 1 Mark each of the following statements as true or false. Assume that all statements are in the architecture (10 pts) context of the MIPS Statement in MIPS it is possible to carry out arithmetic operations on memory operands without Answer ing | |them into registers first 2 In the single cycle implementation, the LW instruction is the longest instruction and as is the one responsible for determining the clock period ? IntheMIPSpipeline, bothreadingan wr iting the register file can be done during half a clock cycle period. In particular reading is done in the first half while writing is done in the second half 4There are 3 types of pipeline hazards: structure, data, and control hazards Load-use hazards cannot benefit from forwarding at all A forwarding unit is responsible for forwarding the appropriate operands when a data dependency that can be solved with forwarding is detected 6 7A doub le data hazard occurs when two consecutive instructions are modifying the same register that is used by the instruction immediately after them. In this case forwarding of the source operand should be done from the output of the MEM stage A two-bit predictor performs better than a single bit predictor even if the conditional branch is executed exactly once 8 9 10 The two-bit predictor is an example of a dynamic branch predictor Superscalar processors are processors having deeper pipelines