Exercise 3. [30 Marks] In this exercise, we will examine cache capacity and its effect on performance. For simplicity, let assume consider only data cache. That is, instructions are not stored in the caches. Recall cache access time is related to its capacity. Consider that accessing main memory requires 100ns and that, in a particular program, 42% of instructions incur a data access. For two different processors executing this program, we have two different L1 caches, attached to processors P1 and P2, respectively. (a) What is the AMAT for P1 and P2 assuming no other levels of cache? (b) Assuming an ideal CPI of 2.0 for both processors, and where the L1 hit time determines the cycle time, what is the CPIstall for P1 and P2? Which processor is faster at executing this particular program? Now consider the addition of an L2 cache to P1 with the following characteristics. The data from the previous table still holds. (c) What is the AMAT for P1 with the addition of an L2 cache? Is the AMAT better or worse with the L2 cache? (d) Assuming an ideal CPI of 2.0 and where the L1 hit time determines the cycle time, what is the CPIstall for P1 with the addition of an L2 cache? (e) Which processor is faster, now that P1 has an L2 cache? If P1 is faster, what miss rate would P1 need in its L1 cache to match P2's performance? If P2 is faster, what miss rate would P2 need in its L1 cache to match P1's performance