F = ( X ' Y ' Z ' W) + ( X ' Y Z ' W ' ) + (X Y ' Z ' W ' ) + ( X Y Z ' W) + ( X ' Y Z W) + ( X Y ' Z W ) + ( X ' Y ' Z W ' ) + ( X Y Z W ' )

Create a design for this circuit. You may use 4 input NANA (7420) gates for this circuit as well as 2 input NAND gates ONLY. NO OTHER GATES ARE ALLOWED, i.e. Inverter(7404).

please draw a circuit for using only NAND gates. Thank you.