Fill in the blanks with the correct terms.

During the [a. execute, b. fetch, c. decode] phase of the CPU's cycle, an instruction is retrieved. The CPU retrieves the instruction from [a. the instruction address register (aka the program counter), b. RAM, c. the instruction register] at the address indicated by [a. the instruction register, b. the instruction address register (aka the program counter), c. RAM]. The instruction then goes in [a. the instruction address register (aka the program counter), b. the instruction register, c. RAM]. Finally, the [a. the instruction register, b. the instruction address register (aka the program counter), c. RAM] is updated so that it contains the address of what would be the next instruction, sequentially. After an instruction is retrieved, the CPU begins the [a. decode, b. fetch, c. execute] phase of its cycle.