Fill the table below with the value of each expression as a Verilog numeric literal including the correct width and the correct value in hexadecimal base. Assume the following declarations: logic $[7$:$0]x$

logic$[3$:$0]y$;

and that $x$ has the value $8\text{'}$hb$6$ and that $y$ has the value $4\text{'}$b$1100.$

$\backslash$table$[[$expression$,$value$],[x[3$:$0],],[x[7$:$4{]}^{{?}^{?}}y,],[(y,x[7$:$4]\},],[)>>(2,],{[}^{{?}^{?}}x,1^{\text{'}}b1$:$2^{\text{'}}d2,],[)(9,]]$