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For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache. (3 Marks) Tag Index

For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache. (3 Marks)

Tag Index Offset 63 - 10 9 - 5 4 - 0

(a) What is the cache block size (in words)? 1 Mark

(b) How many blocks does the cache have? 1 Mark

((c) What is the ratio between total bits required for such a cache implementation over the data storage bits? 1 Mark

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