For this question you will be asked to design a memory decoder circuit and present one

memory$-$block$/$IC from that design.

a$)$ You are building an application specific digital device $($ASDD$)$ that needs to hold $256-$

bytes of data $(8-$bits wide$)$ in a volatile memory. The only available memory units are

$32-$bytes $(8-$bits wide$).$ Design a memory decoder for this custom digital system by

deriving the logic expressions. From the memory user's perspective, they should be

able to use $256-$bytes as a contiguous memory block.

For this part,

i$)$ design only the ASDD memory$-$block$/$IC decoder $($do not design the memory

decoder inside each memory$-$block$/$IC$),$

ii$)$ clearly state how many bits are required for memory$-$block decoding,

iii$)$ clearly state how many bits are required for addressing each block, and

iv$)$ clearly state how a user would access address $(100)10$ in memory $($show

decode$-$bits:address$-$bits$).$

Your decoder must be designed using digital design methodology from lecture and

labs $($truth table, k$-$map, and minimized Boolean functions$).$ You may not use

predesigned integrated circuits elements for the decoder $($e$.$g$.,$ MUX, Encoder,

Decoder, etc.$).[10$ marks$]$