From the textbook : ARM edition of computer organization and design chapter 4

4.5 In this exercise, we examine in detail how an instruction is executed in a

single-cycle datapath. Problems in this exercise refer to a clock cycle in which the

processor fetches the following instruction word: 0xf8014062.

4.5.1 [5] What are the outputs of the sign-extend and the shift left 2

unit (near the top of Figure 4.23) for this instruction word?

4.5.2 [10] What are the values of the ALU control units inputs for this

instruction?

4.5.3 [5] What is the new PC address after this instruction is executed?

Highlight the path through which this value is determined

4.5.4 [10] For each mux, show the values of its inputs and outputs during

the execution of this instruction. List values that are register outputs at Reg [Xn].

4.5.5 [10] What are the input values for the ALU and the two add units?

4.5.6 [10] What are the values of all inputs for the registers unit?

Read address Instruction Instruction memory Uncondbranch Branch Mem Read Instudion p1-2 Instruction 9-6) struction po-161 magister 1 Read data 2 register data 2 instruction data Registers Instruction B1-01 2 extend Instruction B1-21 eft 2 ALU Address Read Data