Fundamentals of Logic Design 9.4:

9.4 Realize a full adder using a 3-to-8 line decoder (as in Figure 9-13) and (a) two OR gates (b) two NOR gates. Analyze the following circuit and draw a truth table giving the value of F for each of the 16 possible select input combinations of A.B.C,D. C o Note that the value of F can be expressed in term of 0, 1, or N. Z. The Decoder outputs to the active enable lines of Mux that has 2 selects input Cand D C D DCD C D