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Get Started ASAP Spring 2019 COSC243 Computer Lab III: The Arithmetic Logic Unit (ALU) Assigned: Friday 3/1/2019 Due: Wednesday 3/15/2019 The goal of this computer

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Get Started ASAP Spring 2019 COSC243 Computer Lab III: The Arithmetic Logic Unit (ALU) Assigned: Friday 3/1/2019 Due: Wednesday 3/15/2019 The goal of this computer lab is to design and simulate the portion of a CPU that is responsible for performing arithmetic and logical operations at the machine level. Design Specification Your design must use 16-bit data (ie. two input 16-bit operands and one output 16-bit result). For this project, 1. you will need to include control signals as inputs in order to switch between the operations listed in the tables below. 2 your design must generate the N,Z,V,C lags 3. your design must generate update flag signals UNUZ UVUC based upon how the N,ZVC are affected as described in the tables below Arithmetic Flags Affected ADD: A plus B N,Z,V.C SUB: A minus B | N,Z,V,C NEG: -A Table 1: ALU Arithmetic Instructions LogicalFlags Affected OR: A +B AND: A-B NOT: A XOR: A @ B N,Z N,Z N,Z N,Z Table 2: ALU Logic Instructions Report Specification Use LogiSim in order to construct and simulate your ALU. Again, the 'help' documentation should prove useful for helping with building subcircuits as well as using components like the splitter and the hex-digit display. In your report, Get Started ASAP Spring 2019 COSC243 Computer Lab III: The Arithmetic Logic Unit (ALU) Assigned: Friday 3/1/2019 Due: Wednesday 3/15/2019 The goal of this computer lab is to design and simulate the portion of a CPU that is responsible for performing arithmetic and logical operations at the machine level. Design Specification Your design must use 16-bit data (ie. two input 16-bit operands and one output 16-bit result). For this project, 1. you will need to include control signals as inputs in order to switch between the operations listed in the tables below. 2 your design must generate the N,Z,V,C lags 3. your design must generate update flag signals UNUZ UVUC based upon how the N,ZVC are affected as described in the tables below Arithmetic Flags Affected ADD: A plus B N,Z,V.C SUB: A minus B | N,Z,V,C NEG: -A Table 1: ALU Arithmetic Instructions LogicalFlags Affected OR: A +B AND: A-B NOT: A XOR: A @ B N,Z N,Z N,Z N,Z Table 2: ALU Logic Instructions Report Specification Use LogiSim in order to construct and simulate your ALU. Again, the 'help' documentation should prove useful for helping with building subcircuits as well as using components like the splitter and the hex-digit display. In your report

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