Give an example of a quiescently consistent register execution that is not regular.

FIGURE 4.22

Boolean to M-valued atomic SRSW register algorithm.

public class AtomicSRSWRegister implements Register { 2 private static int RANGE = M; 3 boolean[] r_bit = new boolean [RANGE]; // atomic boolean SRSW public AtomicSRSWRegister (int capacity) ( for (int i = 1; i = 0; i--) r_bit[i] = false; } public int read() { for (int i = 0; i