how to assign or write procedural verilog for output item and chanage nickle, dime 1, dime 2 for this FSM machine?

module fsm_example3 (

input clk, // clock signal

input reset, // synchronous active high reset signal

input in_5c, // nickel input 5 cents

input in_10c, // dime input 10 cents

input in_25c, // Quater input 25 cents

output reg Z, // Output Z candy

output reg R_5, // Return 5 cents

output reg R_10 // Return 10 cents

);

// State Assignment

parameter INITIAL = 3'd0, // Initial state

S_5 = 3'd1, // Received 5 cents

S_10 = 3'd2, // Received 10 cents

S_15 = 3'd3, // Received 15 cents

S_20 = 3'd4, // Received 20 cents

S_25 = 3'd5, // Received 25 cents

RET_5 = 3'd6, // Candy and return 5 cents

RET_10 = 3'd7, // Candy and return 10 cents

RET_15 = 3'd8, // return 10 cents first and in next clock return candy and remaining 5 cents

RET_20 = 3'd9; // return 10 cents first and in next clock return candy and remaining 10 cents

reg [2:0] cur_state, next_state;

always @ (posedge clk or posedge reset) // current state logic

begin

if (reset)

cur_state <= INITIAL;

else

cur_state <= next_state;

end

always @(*) // next state logic and output logic

begin

next_state = cur_state;

case (cur_state)

INITIAL : begin

Z = 1'b0;

R_5 = 1'b0;

R_10 = 1'b0;

if (in_5c)

next_state = S_5;

else if (in_10c)

next_state = S_10;

else if (in_25c)

next_state = S_25;

end

S_5 : begin

Z = 1'b0;

R_5 = 1'b0;

R_10 = 1'b0;

if (in_5c)

next_state = S_10;

else if (in_10c)

next_state = S_20;

else if (in_25c)

next_state = RET_5;

end

S_10 : begin

Z = 1'b0;

R_5 = 1'b0;

R_10 = 1'b0;

if (in_5c)

next_state = S_15;

else if (in_10c)

next_state = S_20;

else if (in_25c)

next_state = RET_10;

end

S_15 : begin

Z = 1'b0;

R_5 = 1'b0;

R_10 = 1'b0;

if (in_5c)

next_state = S_20;

else if (in_10c)

next_state = S_25;

else if (in_25c)

next_state = RET_15;

end

S_20 : begin

Z = 1'b0;

R_5 = 1'b0;

R_10 = 1'b0;

if (in_5c)

next_state = S_25;

else if (in_10c)

next_state = S_35;

else if (in_25c)

next_state = RET_20;

end

S_25 : begin

Z = 1'b1;

R_5 = 1'b0;

R_10 = 1'b0;

next_state = INITIAL;

end

RET_5 : begin

Z = 1'b1;

R_5 = 1'b1;

R_10 = 1'b0;

next_state = INITIAL;

end

RET_10 : begin

Z = 1'b1;

R_5 = 1'b0;

R_10 = 1'b1;

next_state = INITIAL;

end

RET_15 : begin

Z = 1'b0; // Candy will to despense while returning 5 cents

R_5 = 1'b0;

R_10 = 1'b1;

next_state = RET_5;

end

RET_20 : begin

Z = 1'b0; // Candy will be despense while returning 10 cents

R_5 = 1'b0;

R_10 = 1'b1;

next_state = RET_10;

end

endcase

end

endmodule