Question: I have the solution, but can anyone explain to me how to reach the final output? A diagram would be nice. Given the following implementation

I have the solution, but can anyone explain to me how to reach the final output? A diagram would be nice.

Given the following implementation of a gated(clocked) S-R latch

I have the solution, but can anyone explain to me how to

fill in its truth table:

E

Q(t)

S(t)

R(t)

Q(t+1)

0

0

0

0

0

0

0

0

1

0

0

0

1

0

0

0

0

1

1

0

0

1

0

0

1

0

1

0

1

1

0

1

1

0

1

0

1

1

1

1

1

0

0

0

0

1

0

0

1

0

1

0

1

0

1

1

0

1

1

?

1

1

0

0

1

1

1

0

1

0

1

1

1

0

1

1

1

1

1

?

use ? for undefined states (i.e., when ).

Q(t), S(t), R(t) are the values of Q, S and R at time t, while Q(t+1) is the value of Q at time t+1 (after applying new inputs).

[O S

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