I need help making this in logisim. Im not sure how to make the multiplexer. I know c1= b1+ a1 and c0 = b1bo + a1a0 + a1' b0 + a0b1'

Design #0 (0 points) Consider a 2-bit maximum value selector. There will be four inputs (A1A0B1BO) and two outputs (CICO). Create a truth table, simplified SOP equations, and an implementation for your solution. [NOTE: If you received full credit for Lab #3 then you may simply refer to your previous work done in that laboratory.] Design #1 (1 point) Realize a new solution for a 2-bit maximum value selector that uses two 1-bit 16-to-1 multi- plexers (one to implement C1 and one to implement CO). You may use no other discrete logic devices. Simulate your design, test it, and be prepared to demonstrate your simulation/answer questions/implement your design for your TA. Design #2 (1 point) Again consider a 2-bit maximum value selector. Realize a solution to this design that uses only 1-bit 2-to-1 multiplexers. You may use as many of these multiplexers as you wish, but you may use NO other logic device. Simulate your design, test it, and be prepared to simu- late it/answer questions/implement it about it for your TA. Design #3 (1 point) Realize a new implementation for your 2-bit maximum value selector that uses only NAND gates. You may use as many NAND gates as you wish, but may use NO other discrete logic devices. Simulate your design, test it, and be prepared to simulate it/answer ques- tions/implement it about it for your TA. Design #4 (2 points) Design a 1-bit maximum value selector designed to be used to solve larger problems using an iterative design approach. This may require your one-bit design to have ADDITIONAL in- puts and/or outputs that are used by the 1-bit devices to communicate information about the progress of the overall task to EACH OTHER. What information might one stage of the de- vice need to communicate to other stages of the device? In which direction does information need to follow (MSB->LSB or LSB ->MSB)? Simulate your design, test it, and be prepared to simulate it/answer questions/implement it about it for your TA. WARNING: This may be the most difficult part of the laboratory. Do a few examples by hand. What do you need to keep track of? You may want to represent the things that you need to keep track of by additional inputs/outputs to your device! Don't forget to detail your successes, failures, and thoughts in your lab notebook! Design #0 (0 points) Consider a 2-bit maximum value selector. There will be four inputs (A1A0B1BO) and two outputs (CICO). Create a truth table, simplified SOP equations, and an implementation for your solution. [NOTE: If you received full credit for Lab #3 then you may simply refer to your previous work done in that laboratory.] Design #1 (1 point) Realize a new solution for a 2-bit maximum value selector that uses two 1-bit 16-to-1 multi- plexers (one to implement C1 and one to implement CO). You may use no other discrete logic devices. Simulate your design, test it, and be prepared to demonstrate your simulation/answer questions/implement your design for your TA. Design #2 (1 point) Again consider a 2-bit maximum value selector. Realize a solution to this design that uses only 1-bit 2-to-1 multiplexers. You may use as many of these multiplexers as you wish, but you may use NO other logic device. Simulate your design, test it, and be prepared to simu- late it/answer questions/implement it about it for your TA. Design #3 (1 point) Realize a new implementation for your 2-bit maximum value selector that uses only NAND gates. You may use as many NAND gates as you wish, but may use NO other discrete logic devices. Simulate your design, test it, and be prepared to simulate it/answer ques- tions/implement it about it for your TA. Design #4 (2 points) Design a 1-bit maximum value selector designed to be used to solve larger problems using an iterative design approach. This may require your one-bit design to have ADDITIONAL in- puts and/or outputs that are used by the 1-bit devices to communicate information about the progress of the overall task to EACH OTHER. What information might one stage of the de- vice need to communicate to other stages of the device? In which direction does information need to follow (MSB->LSB or LSB ->MSB)? Simulate your design, test it, and be prepared to simulate it/answer questions/implement it about it for your TA. WARNING: This may be the most difficult part of the laboratory. Do a few examples by hand. What do you need to keep track of? You may want to represent the things that you need to keep track of by additional inputs/outputs to your device! Don't forget to detail your successes, failures, and thoughts in your lab notebook