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I need help with part two: ( 2 1 points ) Assume that all registers are 8 bits wide and that all operations are 8

I need help with part two: (21 points) Assume that all registers are 8 bits wide and that all operations are 8-bit operations. Show the hardware components and the needed interconnections to realize the following RTL specification of a digital subsystem. (Hint: Note the four control signals T1, T2,\alpha , and \beta . Some of these should be used as multiplexer select inputs, while others should be used as the load inputs of registers R1 and R2. Your solution should resemble the examples shown at the end of the "Register Transfer Language" lecture notes.)
T1\alpha ' : R1R2// register copy
T1\alpha : R1R1+ R2// addition
T2\beta ' : R2R1// register copy
T2\beta : R2R1+ R2// addition
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