${?}_{{?}_{{?}_{?}}is\text{u}\text{s}\text{e}\text{d}to\text{s}\text{t}\text{o}\text{r}\text{e}\text{f}\text{i}\text{l}\text{e}\text{s}\text{m}\text{a}\text{i}\text{n}\text{l}\text{y}\text{n}\text{e}\text{e}\text{d}\text{e}\text{d}to\text{b}\text{o}\text{o}\text{t}up\text{t}\text{h}\text{e}\text{c}\text{o}\text{m}\text{p}\text{u}\text{t}\text{e}\text{r}\text{.}}$

virtual memory

read$-$only memory $(ROM)$

processor cache

random access memory $(RAM)$