I want to solve this question

What is the speedup factor for pipelined processor A and non-pipelined processor B. if the number of instructions is .1 .5000, each instruction takes 6 stages to be done, and the time of each stage =80ns .Describe what causes data hazards and control hazards, and give an example for each one .2 :The following instructions are executed on a 5-stage MIPS processor (IF, ID, EX, MEM, WB) .3 Addi $50,$50,3 Add $5,$50,$t3 ?What type of hazard exists? And how can it be solved