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Implement (in Verilog), the following equation, where x[n) and y[n] are in Q1.7 and Q2.6 formats, respectively, and zinis an unsigned number in Q0.8 format:

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Implement (in Verilog), the following equation, where x[n) and y[n] are in Q1.7 and Q2.6 formats, respectively, and zinis an unsigned number in Q0.8 format: w[n] = x[n]y[n] + y[n]2[n] + x[n] + y[n] + z[n]. As part of your answer, you must choose an appropriate Q format for w[n]. Note that we did not discuss unsigned fixed point, but Q0.8 corresponds to an eight-bit representation where the most significant bit is b_1 and the least significant bit is b-8. The number being represented is b-12-1 + b_22-2 + ... + b_82-8. There are two conflicting notations for fixed point. Both notations are written as Qm.n, where: . Q designates that the number is in the Q format notation - the Texas Instruments representation for signed fixed-point numbers (the "Q" being reminiscent of the standard symbol for the set of rational numbers). m. (optional, assumed to be zero or one) is the number of bits set aside to designate the two's complement integer portion of the number, exclusive or inclusive of the sign bit (therefore if m is not specified it is taken as zero or one) .n is the number of bits used to designate the fractional portion of the number, i.e. the number of bits to the right of the binary point. (If n = 0, the Q numbers are integers - the degenerate case). One convention includes the sign bit in the value of m, 112) and the other convention does not. The choice of convention can be determined by summing m+n. If the value is equal to the register size, then the sign bit is included in the value of m. If it is one less than the register size, the sign bit is not included in the value of m. In addition, the letter U can be prefixed to the Q to indicate an unsigned value, such as UQ1.15, indicating values 215 - 1 from 0.0 to +1.999969482421875 (that is, 1+ 215 Signed Q values are stored in two's complement format, just like signed integer values on most processors. In two's complement, the sign bit is extended to the register size. For a given Qm.n format, using an mun bit signed integer container with n fractional bits: . its range is (-(2-1),2m-1-2- its resolution is 2" For a given UQm.n format, using an m+n bit unsigned integer container with n fractional bits: its range is 0,2m-2-n1 . its resolution is 2-1 For example, a Q15.1 format number: requires 15+1 = 16 bits its range is (-214, 214. 2-1) = (-16384.0, +16383.5] = [0x8000, 0x8001 ... OxFFFF, 0x0000, 0x0001 ... 0x7FFE, 0x7FFF] . its resolution is 2-1 = 0.5 Unlike floating point numbers, the resolution of Q numbers will remain constant over the entire range. Implement (in Verilog), the following equation, where x[n) and y[n] are in Q1.7 and Q2.6 formats, respectively, and zinis an unsigned number in Q0.8 format: w[n] = x[n]y[n] + y[n]2[n] + x[n] + y[n] + z[n]. As part of your answer, you must choose an appropriate Q format for w[n]. Note that we did not discuss unsigned fixed point, but Q0.8 corresponds to an eight-bit representation where the most significant bit is b_1 and the least significant bit is b-8. The number being represented is b-12-1 + b_22-2 + ... + b_82-8. There are two conflicting notations for fixed point. Both notations are written as Qm.n, where: . Q designates that the number is in the Q format notation - the Texas Instruments representation for signed fixed-point numbers (the "Q" being reminiscent of the standard symbol for the set of rational numbers). m. (optional, assumed to be zero or one) is the number of bits set aside to designate the two's complement integer portion of the number, exclusive or inclusive of the sign bit (therefore if m is not specified it is taken as zero or one) .n is the number of bits used to designate the fractional portion of the number, i.e. the number of bits to the right of the binary point. (If n = 0, the Q numbers are integers - the degenerate case). One convention includes the sign bit in the value of m, 112) and the other convention does not. The choice of convention can be determined by summing m+n. If the value is equal to the register size, then the sign bit is included in the value of m. If it is one less than the register size, the sign bit is not included in the value of m. In addition, the letter U can be prefixed to the Q to indicate an unsigned value, such as UQ1.15, indicating values 215 - 1 from 0.0 to +1.999969482421875 (that is, 1+ 215 Signed Q values are stored in two's complement format, just like signed integer values on most processors. In two's complement, the sign bit is extended to the register size. For a given Qm.n format, using an mun bit signed integer container with n fractional bits: . its range is (-(2-1),2m-1-2- its resolution is 2" For a given UQm.n format, using an m+n bit unsigned integer container with n fractional bits: its range is 0,2m-2-n1 . its resolution is 2-1 For example, a Q15.1 format number: requires 15+1 = 16 bits its range is (-214, 214. 2-1) = (-16384.0, +16383.5] = [0x8000, 0x8001 ... OxFFFF, 0x0000, 0x0001 ... 0x7FFE, 0x7FFF] . its resolution is 2-1 = 0.5 Unlike floating point numbers, the resolution of Q numbers will remain constant over the entire range

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