Improved trafic lights: N 000 W ctor Car Detecto 000 S This machine has two inputs eastwestwaiting that indicate that cars are waiting on the east-west road (ew) Once the lights are switched to east-west or left-turn, we leave A master FSM accepts the inputs and decides which direction them switched until either no more cars are detected in that should be green dir. To time when it is time to force the lights direction, or until a timer expires. back to north-south, it uses a timer, Timern. It also receives a requests with the done signal. It also generates the 3-bit light The lights then return to green in the north-south direction. signal ok back from the combiner that indicates that the signal which indicates which light in the current direction sequence from the last direction change is complete and the should be illuminated. When the on signal is set high, it Each time the lights are switched the lights in the active direction is allowed to change again. requests that the light signal switch the light signal to green. direction go from green to yellow. When this is completed, and the minimum green time interval Then, after a time interval, they are switched to red. The modules here illustrate two types of relationships. The master FSM and combiner modules form a pipeline. Requests has elapsed, the light FSM responds by asserting done. When Then, after a second time interval, the lights in the active flow down this pipeline from left to right. A request is input to the on signal is set low, it requests that the light FSM sequence direction are switched to green. The lights are not allowed to the Master FSM in the form of a transition on the the light signal to red - via a yellow state and observing the change again until they have been green for a third time eastwestwoiting and leftlane inputs. The Master processes this required time intervals. When this is completed done is set low. interval request and in turn issues a request to the combiner on the dir The light FSM uses its own timer (Timer2) to count out the time lines. The combiner in turn processes the request and outputs intervals required for light sequencing. Below is the block diagram of factored traffic lights: the appropriate sequence on the lights output in response.. Th For the interface between the light FSM and the combiner, the ok signal here is an example of a flow control signal. It provides done signal provides flow control. The combiner can only toggle backpressure on the master FSM to prevent it from getting on high when done is low and can only toggle on low when eastwestwaiting ahead of the combiner and light FSMs. The master FSM makes done is high. After toggling on, it must wait for done to switch lights a request and it is not allowed to make another request until leftlane to the same state as on before switching on again. the ok signal indicates that the rest of the circuit is finished processing the first request. A) (10) Draw the state diagram for the master FSM (The names of the state) Ns Lt EW FSM The other relationships in the block diagram are master-slave relationships. The Master FSM acts as a master to Timer1, B) (10)Draw the state diagram for light fsm giving it commands, and Timer1 acts as a slave, receiving the (name the states as yesil, sari, kirmizi) commands and carrying them out. In a similar manner the (5) state your encoding for each fsm combiner is the master of the Light FSM which in turn is the D) (35)implement the all the necassay modules in verilog. Each master of Timer2. The light FSM sequences the traffic lights module should be in its own file. from green to red and then back to green. It receives requests from the combiner on the on signal and responds to these And input leftlane that cars are waiting in a left-turn lane (It). dir Master FSM Combiner ok The machine has nine output lines that drive three sets of three lights each one set each for the north-south road, the east-west road, and the left-turn lane (from the northsouth road). At the default state north-south road light will be green for the north-South road. When a car is detected on the east-west road or the left-turn lane, we wish to switch the lights so that the east-west or left- turn light is green (with priority going to the left-turn lane). Timer Light tload Timer2 E) Main Module and Test bench code and Improved trafic lights: N 000 W ctor Car Detecto 000 S This machine has two inputs eastwestwaiting that indicate that cars are waiting on the east-west road (ew) Once the lights are switched to east-west or left-turn, we leave A master FSM accepts the inputs and decides which direction them switched until either no more cars are detected in that should be green dir. To time when it is time to force the lights direction, or until a timer expires. back to north-south, it uses a timer, Timern. It also receives a requests with the done signal. It also generates the 3-bit light The lights then return to green in the north-south direction. signal ok back from the combiner that indicates that the signal which indicates which light in the current direction sequence from the last direction change is complete and the should be illuminated. When the on signal is set high, it Each time the lights are switched the lights in the active direction is allowed to change again. requests that the light signal switch the light signal to green. direction go from green to yellow. When this is completed, and the minimum green time interval Then, after a time interval, they are switched to red. The modules here illustrate two types of relationships. The master FSM and combiner modules form a pipeline. Requests has elapsed, the light FSM responds by asserting done. When Then, after a second time interval, the lights in the active flow down this pipeline from left to right. A request is input to the on signal is set low, it requests that the light FSM sequence direction are switched to green. The lights are not allowed to the Master FSM in the form of a transition on the the light signal to red - via a yellow state and observing the change again until they have been green for a third time eastwestwoiting and leftlane inputs. The Master processes this required time intervals. When this is completed done is set low. interval request and in turn issues a request to the combiner on the dir The light FSM uses its own timer (Timer2) to count out the time lines. The combiner in turn processes the request and outputs intervals required for light sequencing. Below is the block diagram of factored traffic lights: the appropriate sequence on the lights output in response.. Th For the interface between the light FSM and the combiner, the ok signal here is an example of a flow control signal. It provides done signal provides flow control. The combiner can only toggle backpressure on the master FSM to prevent it from getting on high when done is low and can only toggle on low when eastwestwaiting ahead of the combiner and light FSMs. The master FSM makes done is high. After toggling on, it must wait for done to switch lights a request and it is not allowed to make another request until leftlane to the same state as on before switching on again. the ok signal indicates that the rest of the circuit is finished processing the first request. A) (10) Draw the state diagram for the master FSM (The names of the state) Ns Lt EW FSM The other relationships in the block diagram are master-slave relationships. The Master FSM acts as a master to Timer1, B) (10)Draw the state diagram for light fsm giving it commands, and Timer1 acts as a slave, receiving the (name the states as yesil, sari, kirmizi) commands and carrying them out. In a similar manner the (5) state your encoding for each fsm combiner is the master of the Light FSM which in turn is the D) (35)implement the all the necassay modules in verilog. Each master of Timer2. The light FSM sequences the traffic lights module should be in its own file. from green to red and then back to green. It receives requests from the combiner on the on signal and responds to these And input leftlane that cars are waiting in a left-turn lane (It). dir Master FSM Combiner ok The machine has nine output lines that drive three sets of three lights each one set each for the north-south road, the east-west road, and the left-turn lane (from the northsouth road). At the default state north-south road light will be green for the north-South road. When a car is detected on the east-west road or the left-turn lane, we wish to switch the lights so that the east-west or left- turn light is green (with priority going to the left-turn lane). Timer Light tload Timer2 E) Main Module and Test bench code and