In part f and g, how???

All I know is that "the interrupt with lower level should preempt the one with higher level". But why it doesn't work in part f. Am I wrong about this concept??

C2. Interrupt Priority Assume 5 bits are implemented in the Priority Level Register for the following sub-questions (a) How many different priority levels are there? Answer: (b) What are the values of the highest programmable priority and lowest programmable priority (in hexadecimal)? Answers: (Highest priority)_0x00_ (c) To allow 4 groups for preemption (i.e, group 0 can preempt groups 1 to 3, group 1 can (Lowest priority) Ox preempt groups 2 and 3, and group 2 can preempt group 3), what Priority Group setting should be used? Answer: PRIGROUP (d) What groups (0 to 3) do the interrupts with priority levels 0xFO, 0xC0, and 0x80 belong? Answers: (0xF0) (e) What interrupt will be handled first if all three interrupts (0xF0, 0xC0 and 0x80) arrive at (0xCO)_3(Ox80)2 the same time? Answer (f) Can the interrupt with level 0xC0 preempt interrupt with level 0xF0? Answer: 0 (g) Can the interrupt with level 0x80 preempt interrupt with level 0xF0? Answer Table 7.5 Definition of Preempt Priority Field and Subpriority Field in a Priority Level Register in Different Priority Group Settings Priority Group 0 Preempt Priority Field Subpriority Field Bit 17:1] Bit 7:2] Bit 7:3] Bit 17:4] Bit 7:5 Bit 7:6 Bit 7 None Bit [O] Bit [1:0] Bit [2:0] Bit 13:0] Bit [4:0] Bit [5:0] Bit [6:0] Bit 17:0] 3 4 6 7