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In the design of a new ALU of a new AMD microprocessor, a 2 - bit wide logical unit was proposed that compares any two

In the design of a new ALU of a new AMD microprocessor, a 2-bit wide logical unit was proposed that compares any two 2-bit data fetched from the RAM. Whenever the 2-bit data fetched are of equal magnitude, they are required to be multiplied, whenever the first 2-bit fetched has a higher magnitude than the second one, the two arguments are subtracted, and whenever the first 2-bit data fetched has a lesser magnitude compared to the second one, both arguments are added. The chip engineers are considering using a pre-designed combinational logic circuit to accomplish this computational task. You are required to design a suitable combinational logic circuit that would perform the desired operation of the new ALU. All required truth tables, logic equations, and logic circuit diagrams must be clearly shown.
Question 2
Design a Finite State Machine (FSM) such that, L={w \epsi {0,1}*: w ends with 2 consecutive 1,|w|=4}
Derive the state transition table for the FMS
Design a clock sequential circuit using JK flip-flop, indicating all required tables, equations, and circuit diagrams.

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