In this exercise we examine in detail how an instruction is executed in a single cycle datapath. Problems in this exercise refer to a clock cycle in which the processor answers in decimal unless otherwise specified.

Assume that data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

$\backslash$table$[[$R$0,$R$1,$R$2,$R$3,$R$4,$R$5,$R$6,$R$8,$R$12,$R$31],[0,-1,2,-3,-4,10,6,8,2,-16]]$

a$)$ What is the MIPS assembly instruction?

b$)$ What are the outputs of the sign$-$extend and the "Shift left $2"$ for this instruction word?c$)$ What are the values of the ALU control unit's inputs for this instruction?

d$)$ What is the new PC address after this instruction is executed?

e$)$ For each Mux, show the values of its data output during the execution of this instruction

and these register values.

RegDst:

MemtoR$$

Jump:

ALUSrc: $.$

Branch:

f$)$ For the ALU and the two add units, what are their data input values?

ALU$1$:$\_$

ALU$2$:

AddPC$1$:

AddPC$2$:

AddBranch$1$:

AddBranch$2$:

g$)$ What are the values of all inputs for the "Registers" unit?

ReadReg$1$:

ReadReg$2$:

WriteReg:

WriteData:Question $2(10$ Points$)$ In this exercise we examine in detail how an instruction is executed in a single cycle datapath. Problems in this exercise refer to a clock cycle in which the processor answers in decimal unless otherwise specified.

Assume that data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

$\backslash$table$[[$R$0,$R$1,$R$2,$R$3,$R$4,$R$5,$R$6,$R$8,$R$12,$R$31],[0,-1,2,-3,-4,10,6,8,2,-16]]$

a$)$ What is the MIPS assembly instruction?

b$)$ What are the outputs of the sign$-$extend and the "Shift left $2"$ for this instruction word?Question $2(10$ Points$)$ In this exercise we examine in detail how an instruction is executed in a single cycle datapath. Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: $10101100011000100000000000010100.$ Provide all answers in decimal unless otherwise specified.

Assume that data memory is all zeros and that the processor's registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

$\backslash$table$[[$R$0,$R$1,$R$2,$R$3,$R$4,$R$5,$R$6,$R$8,$R$12,$R$31],[0,-1,2,-3,-4,10,6,8,2,-16]]$