In this lab, you will be redesigning your 7-segment display driver from the previous parts of Lab 4 using a 74138 decoder. This circuit will require significant wiring on the output side. As you will see from the truth table below, you will not be creating your Karnaugh maps or doing Boolean simplification on the inputs from your switches. Instead you will be using the outputs from the decoder. Because of this do not wait until the last minute to build your circuit using logisim. The datasheet for the 74138 chip you will be using in lab can be found in your lab guide. In addition I have built a starter circuit for you to use. There is also a circuit library that you will need to install in Logisim for it to work. When you open the starter circuit it might ask you for the location of the missing library. If so, point it to wherever you have the library saved. You will be able to determine the decoder output by playing with the starter circuit and referencing the datasheet. If you can get your additional number of gates used down to 10, you will get 5 points, 9 gates 8 points, 8 gates 10 points, 7 gates 15 points. If you can get below 7 gates, you will get 25 points applied to your overall Lab 4 grade. Your prelab should include designs for your circuit including pin and chip numbers, your Karnaugh maps used to generate the simplified output, and the inputs and expected outputs in truth table in the checklist completed.

A	B	C	D	E	F	G
1	0	0	1	1	1	0
1	1	0	0	1	1	1
1	0	0	1	1	1	1
1	1	1	0	1	1	0
1	1	1	1	0	0	1
1	1	1	0	0	0	0
1	1	1	1	1	1	0
1	1	1	1	1	1	0

S3 Inputs!TT Decoder Output a 6TaSe 2 7-Segment Output 5 2 0 1 0 1 1 0 0 1 0 1 0 0 1 1 0