In this part, your aim is to verify the design method used for designing the combinational logic digital circuit. The truth table for a four-input digital combinational logic circuit is shown below. Draw the resultant circuit using any logic gates. The input of the logic gates cannot be more than two. Then simulate the circuit in Multisim. Use the Karnaugh Map (K-Map) method to find the simplest combinational digital circuit that will implement this truth table. Then draw the resultant circuit using any logic gates. The input of the logic gates cannot be more than two. Then simulate the circuit in Multisim and compare the outputs from the two methods and comment on the results (the K-Map you developed, and the Multisim output). What are the applications of the circuit (what can you use it for)?

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Most significant bit (MSB) D C B Least Significant Bit (LSB) 0 1 0 0 0 0 Output 1 1 0 0 0 0 1 0 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 1 1 0 1 0 0 1 0 1 0 1 0 1 O 1 0 0 0 1 1 1 1 0 1 1 0 0 1 1 O 1 1 1 1 1 1 1 1 0 1 0 1 0 1 1 1 1