ing state table$($a$)$ Reduce the number of states in the state table and tabulate the reduced state table.$($b$)$ Starting from state a$,$ and the input sequence $01110010011,$ determine the outputsequence for the state table$\mathrm{.}2)$ Design a sequential circuit with two JK flip$-$flops A and B and two inputs E and x$.$ If E $=0,$ the circuit remains in the same state regardless of the value of x$.$ When E $=1$ and x $=1,$ the circuit goes through the state transitions from $00$ to $01,$ to $10,$ to $11,$ back to $00,$ and repeats. When E $=1$ and x $=0,$ the circuit goes through the state transitions from $00$ to $11,$ to $10,$ to $01,$ back to $00,$ and repeats$\mathrm{.}3)$ A sequential circuit has three flip$-$flops A$,$ B$,$ C; one input x; and one output y$.$ The state diagram is shown in the figure below. The circuit is to be designed by treating the unused states as dont$-$care conditions. Analyze the circuit obtained from the design to determine the effect of the unused states.$($a$)$ Use D flip$-$flops in the design. $($b$)$ Use JK flip$-$flops in the design. $4)$ Draw the logic diagram of a fourbit register with four D flipflops and four $4\backslash$times $1$ multiplexers with mode selection inputs S$1$ and S$0.$ The register operates according to the following function table$\mathrm{.}5)$ How many flipflop will be complemented in a $10$bit binary ripple counter to reach the next count after the following counts?$($a$)1001100111($b$)00111111116)$ The memory units that follow are specified by the number of words times the number of bits per word. How many address lines and inputoutput data lines are needed in each case?$($a$)2$G X $8($b$)16$M X $327)$ A $16$K X $4$ memory uses coincident decoding by splitting the internal decoder into Xselection and Yselection.$($a$)$ What is the size of each decoder, and how many AND gates are required for decoding the address?$($b$)$ Determine the X and Y selection lines that are enabled when the input address is the binary equivalent of $6,000$