Introduction

In Part A of the lab, you simulated a $1$ bit adder with a carry$-$in bit. It is relatively straightforward

to cascade multiple adders to allow for N bit addition. Many computers use these not only for

construction of arithmetic logic units $($ALUs$),$ which are central to building Central Processing

Units $($CPUs$),$ but also for calculating addresses, table indices, increment$/$decrement operations,

etc.

In Part B$,$ you will continue the work started in Part A to construct a physical circuit using the

logic chips in your lab kit.

Pre$-$Lab

Before coming to the lab, every student should complete the following tasks:

$1)$ Read and understand the Lab $1$ Background information. It will introduce digital logic

gates, as well as some general information that will aid you in the lab. This should have

been done prior to Part A$,$ but it is important to understand the section on creating circuit

drawings for this week$$s work.