J1= !X1 !X2 + Q2 X1 X2

K1= !X1 !X2 + !Q2 X1 X2

J2= !X1 !X2 + !Q1 X1 X2

K2= !X1 !X2 + Q1 X1 X2

Z= Q1

How would you wire this? It says it resets to State A = 00, which is the first state. And would Clock2 have a NOT NAND gate before it? And everything has to be with NANDS.
 

Q2 2 CLOCK 2 RESET 2 K2 5 SET 2 VSS 8 CD4027 16 VDD 15 Q1 14 Q1 13 CLOCK 1 12 RESET 1 11 K1 10 J1 9 SET 1