Machine Organization class

I would like you to add sole explanations for esch step, thank you

(a) What function does the clock have with this circuit? (b) Identify the function of each multiplexer and demultiplexer. (c) Why do we need two WriteEnable inputs? (d) What is the purpose of the controlled buffers attached to the Q pin of each register? (e) Suppose that ReadEnable is set to 1, and RegSelect is set to 0, and that regA contains 01 , regB0 contains 10 , and regB1 contains 01 . What will out A be, and why