Measurements obtained show that the instruction miss rate is 12% and the data miss rate is 8%, and that on average, 20% of all instructions contain two data references. The hit time and miss penalty are 10ns and 50ns respectively. a. What is average memory access time? b. What is Memory stall cycle if CPU runs at 5GHz and the program contains 10,000 instructions? C. Which implementation is better: Increasing Cache hit ratio by 5% or decrease cache Hit time by 5%.