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MiniALU Help. I need help implementing this MiniALU HDL. This is what I have so far. Please advise on a proper solution. File Edit Format

MiniALU Help. I need help implementing this MiniALU HDL. This is what I have so far. Please advise on a proper solution.

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File Edit Format View Hel f is control bits 000: out-a AND b 001: out -a OR b 010: out-a tb 011: not used 100: out -a AND NOT(b) 101: out-a OR NOT(b) 110: out = a-b 111: SLT (SET LESS THAN) out is 1 if a f belse 0 CHIP MiniALU [ IN a[16], bl16) flal: //16-bit inputs and contral bits OUT out[16] //16-bit output PARTS: /zero the x input and y input Mux16(a -X, b-false, sel -zx, out -xl); Mux16(a - y, b-false, sel -zy, out-y1); // Perform f And16(a -x1, b-y1, out- xandy) Mux16(a xandy, b-xaddy, sel -f, out- out); File Edit Format View Hel f is control bits 000: out-a AND b 001: out -a OR b 010: out-a tb 011: not used 100: out -a AND NOT(b) 101: out-a OR NOT(b) 110: out = a-b 111: SLT (SET LESS THAN) out is 1 if a f belse 0 CHIP MiniALU [ IN a[16], bl16) flal: //16-bit inputs and contral bits OUT out[16] //16-bit output PARTS: /zero the x input and y input Mux16(a -X, b-false, sel -zx, out -xl); Mux16(a - y, b-false, sel -zy, out-y1); // Perform f And16(a -x1, b-y1, out- xandy) Mux16(a xandy, b-xaddy, sel -f, out- out)

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