MIPS Decoder.

For this assignment, you will write a program to accept machine code (as hexadecimal strings) from the user, decode and report certain features of the decoded MIPS instruction.

Main program: Your main program must perform the following tasks:

• Accept a machine instruction word and its address as two strings from the user.
• Extract the numeric value from the input strings.
• Call subroutine get_type(details below) and print the format type (I/J/R) of the instruction. If the instruction is not supported, print "invalid".
• Call subroutine get_dest_reg(details below) and print the destination register number of the instruction. The register number must be printed out as a decimal value. If there is no destination register, print "none". If the specified destination register is wrong or instruction is not supported, print "invalid".
• Call subroutine get_next_pc(details below) and print the address(es) of the next instruction. The addresses must be printed out as hexadecimal values. If the instruction is not supported, print "invalid".
  • Assumptions:
  • The inputs from the user (to specify an instruction word and its address) are strings of 8-character long excluding the ending newline. They are valid hexadecimal values, for example "00811002" or "A0A110DB".
  • You can assume that the input address is always a valid one following MIPS conventions and there is no need for your program to check that. You do not need to check the range of the return of get_next_pc() either.
  • You can assume only capital case letters ('A' to 'F') will be used for the input.
  • You can assume only a subset of MIPS instructions are supported: add, addi, sub, slt, lw, sw, beq, j.

Required subroutines:

• int get_type(int instruction)
  • Parameter: instruction is a 32-bit unsigned number representing a machine instruction word.
  • Return: an integer with the following possible values o 1-R type, 2-I type, 3-J type, 0-not supported
• int get_dest_reg(int instruction)
  • Parameter: instruction is a 32-bit unsigned number representing a machine instruction word.
  • Return: an integer representing the register number which will be updated by executing of this instruction. A valid return should be within the range of [0,31]. Return 32 if no register gets updated by the instruction. Return 0 for invalid instructions or invalid destination register. Note: some instruction might update $rt instead of $rd.
• int get_next_pc(int instruction, int addr)
  • Parameters: instruction is a 32-bit unsigned number representing a machine instruction word; addr is a 32-bit unsigned number representing the address (PC) of instruction.
  • Return:
    • For sequential and jump instructions, return an integer representing the address of the next instruction we will fetch and execute in $v0;
    • For branch instructions, return two integers representing the addresses of the next instruction we will fetch and execute if branch is taken (in $v1) and the next instruction if branch is not taken (in $v0).
    • You can assume the next pc is never going to be zero and return 0 in $v0 for invalid instructions.
    • Note: You might be able to use this one to double check your answer to Part 1 Question 3.

Coding Requirements:

• You must mark clear the start and end of all three required subroutines.
• You must declare all three required subroutines to be global. For example, use these two lines to start your subroutine get_type(): .globl get_type get_type:
• Your definition must follow MIPS register usage conventions as discussed in our textbook and slides. See Appendix of this document for a quick reference.
• You code must be very well commented. A description of the algorithm you use must be included in your comments.

Hints:

• You may need to use la to load an address into a register.
• ASCII encoding of symbols can be useful. You can turn on/off "ASCII" in MARS to inspect the memory content for the input string. Here is a link to useful ASCII coding: http://en.wikipedia.org/wiki/ASCII#Printable_characters .
• Feel free to define additional helper functions.
• You may find system calls useful to read in string and/or print a value in hex or other formats. Print out binary patterns can help with debugging. http://courses.missouristate.edu/KenVollmar/mars/Help/SyscallHelp.html

Conventions to follow:

Appendix: MIPS ISA There are MIPS conventions you need to follow and a subset of MIPS instructions that you need to support in order to implement the coding part of this assignment. It is assumed that you acquire this knowledge from our textbook/lecture slides, but this section serves as a quick reference for you. MIPS instructions that vou must support: You are required to support only a subset of MIPS instructions. Use the table below as your quick reference. For all other inputs, your program should output "invalid" for the required checkings MIPS add sub funct 0x20 0x22 MIPS addi funct opcode 0x00 0x00 0x23 0x04 opcode 0x08 0x00 0x2b 0x02 0x2a SW be MIPS conventions vou must follow: You are required to follow MIPS conventions for register usages and function calls/returns Check the textbook and lecture slides for details. Here is a quick summary Function calls/returns must use jal and jr. Arguments and return values must use Sa and Sv registers in order. That is, the first argument must use Sa0, the second argument must use Sal, etc. If there is only one 32- bit return value, Sv0 must be used Use stack and Ssp for local data and register spilling Divide the maintenance of shared registers between the caller and callee following the table below: . . . * Reg Name Reg Number Usage Whose Responsibilitv? Caller Callee 2-3 4-7 Sa0-Sa3 St0-St7, St8-$t98-15,24-2.5 Ss0-Ss7 Ss Sra Return value Argument Temporaries Saved Stack pointer Return address 16-23 29 * The value of Sra will not be changed by the callee but will be changed by jal. Appendix: MIPS ISA There are MIPS conventions you need to follow and a subset of MIPS instructions that you need to support in order to implement the coding part of this assignment. It is assumed that you acquire this knowledge from our textbook/lecture slides, but this section serves as a quick reference for you. MIPS instructions that vou must support: You are required to support only a subset of MIPS instructions. Use the table below as your quick reference. For all other inputs, your program should output "invalid" for the required checkings MIPS add sub funct 0x20 0x22 MIPS addi funct opcode 0x00 0x00 0x23 0x04 opcode 0x08 0x00 0x2b 0x02 0x2a SW be MIPS conventions vou must follow: You are required to follow MIPS conventions for register usages and function calls/returns Check the textbook and lecture slides for details. Here is a quick summary Function calls/returns must use jal and jr. Arguments and return values must use Sa and Sv registers in order. That is, the first argument must use Sa0, the second argument must use Sal, etc. If there is only one 32- bit return value, Sv0 must be used Use stack and Ssp for local data and register spilling Divide the maintenance of shared registers between the caller and callee following the table below: . . . * Reg Name Reg Number Usage Whose Responsibilitv? Caller Callee 2-3 4-7 Sa0-Sa3 St0-St7, St8-$t98-15,24-2.5 Ss0-Ss7 Ss Sra Return value Argument Temporaries Saved Stack pointer Return address 16-23 29 * The value of Sra will not be changed by the callee but will be changed by jal