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My ID is 20190351 the is counter is 0 and 1 , if the counter is 0 my id will be in order , if

My ID is 20190351 image text in transcribed
the is counter is 0 and 1 , if the counter is 0 my id will be in order , if the counter is 1 my id will be in reverse order
0 Digital Logic Design Mini-Project Description In this mini-project, you are required to design a simple digital system that is composed of a synchronous sequential logic circuit (SLC). The SLC is basically a counter built using JK flip-flops that behaves based on an external input. The count value should be displayed on a Seven Segment Display. The counter behavior depends on your university ID as explained in Table 1 below. Table I. Counter Behavior External Input Counter Behavior Numbers in your ID in order Numbers in your ID in reverse order For example, if your ID is 20198765and the external input is 0 then your counter's pattern is2,0,1,9,8,7,6,5,2,0,1,... If the external input is 1 then the counter's pattern is 5,6,7,8,9,1,0,2,5,... Submission Guidelines 1. Submission is electronic via the elearning system. 2. Make sure you design the counter that matches your ID. 3. Make sure to use the correct value of R based on the equation above. 4. You need to submit two files. a. The first file should contain you detailed design (handwritten). Scan your solution and merge all images in one pdf file. Make sure to write your name on every page you use. Otherwise, it is considered a copying attempt. b. The second file is the Logisim file that shows your design. Make sure to put input pins for the external input and the clock, in addition to the LEDs so that we can test your circuit. 5. Cheating will not be tolerated

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