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MY VHDL ASSIGNMENT. PLEASE HELP. Design a counter circuit using VHDL coding that executes the washing machine example in Lecture 18: 4) Design a sequential

MY VHDL ASSIGNMENT. PLEASE HELP.

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Design a counter circuit using VHDL coding that executes the washing machine example in Lecture 18: 4) Design a sequential logic circuit for a washing machine controller, which keeps track of the modes and runs different functionalities during each mode. The modes are IDLE LOAD WASH DRY. The inputs are START, RESUME, STOP and PAUSE. The following functions are executed for each mode: ForIDLE:F=XY+XYZ,ForWASH:F=XY+X(Y+Z),ForLOAD:F=XY+XYZForDRY:F=(X+Y)(X+Y+Z) Here, X,Y and Z are input bits, while F is an output bit. Find the state table, diagram, circuit/state equations and circuit schematics. (a) Show and explain your VHDL code ( 25 points). (b) Show that your VHDL code is synthesized successfully ( 25 points). (c) Show and describe the RTL schematics (register transfer level circuit) of your ALU (25 points). (d) Prepare a simulation code that tests each functionality. Explain the functionality using the behavioral model ( 25 points)

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