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NEED DETAILED EXPLANATION.... 2. (Computer Arithmetic) (30 points) Write a procedure for computing A + B where A is a 128-bit signed integer and B
NEED DETAILED EXPLANATION....
2. (Computer Arithmetic) (30 points) Write a procedure for computing A + B where A is a 128-bit signed integer and B is a 64-bit signed integer. Assume that A is stored in X4 and X5 (the most significant 64-bits in X4 and the least significant in X5) and B in X7. The most significant 64-bits of the result should be returned in X2 and the least significant in X3 ladd: EOR X6, X6, X6 // X60 SUBS XZR, X7, XZR // sign-extend X7 into X6 B.GE next SUBI x6, XZR, #1 // X6 = Oxffff ffff ffff ffff next: ADDS X3, X5, X7// add LSB's B.LO finish ADDI X2, X2, #1 ADD // if X5 + x7 generates carry finish: ADD X2, X2, X4 X2, X2, X6 LR BR. STOP stop execution branch BL BR B.EQ B.NE B.LT B.LE B.GT B.GE B.LO B.LS B.HI .HS B.MI B.PL B.VS B.VC B. CS B.CC CBZ CBNZ STURB LDURB STURH LDURB STURW LDURSWD load signed word STUR LDUR STXR LDXR B branch with link Rbranch register CB branch if equal CBbranch if not equal CBbranch if signed less than CBbranch if signed less than or equal CBbranch if signed greater than CBbranch if signed greater than or equal CBbranch if unsigned lower CBbranch if unsigned lower or same CBbranch if unsigned higher CBbranch if unsigned higher or same CBbranch if negative CBbranch if non-negative CB branch if overflow set CB branch if overflow clear CBbranch if carry set CBbranch if carry clear CBcompare and branch if zero CBcompare and branch if not zero Dstore byte D oad byte D store half word Dload half word store word Dstore register load register Rstore exclusive register Dload exclusive register Table 1: LEGv8 Instructions (part I) Format ADD SUB AND ORR EOR ADDI SUBI ANDI ORRI EORI ADDS SUBS ANDS ADDIS SUBIS ANDIS LSR LSL MOVZ MOVK MUL UMULH SMULHRsigned multiply high UDIV SDIV R add R and Rexclusive or Rsubtract or add immediate subtract immediate and immediate or immediate exclusive or immediate R add & set flags Rsubtract & set flags Rand & set flags Iadd immediate & set flags subtract immediate & set flags and immediate & set flags Rlogical shift right Rlogical shift left IWmove wide with zero IWmove wide with keep R multiply unsigned multiply high unsigned divide signed divide Table 2: LEGv8 Instructions (part II)Step by Step Solution
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