Non-contiguous allocation based on paging techniques, often implemented in a sub-system called the Memory Management Unit (MMU), allows dynamic allocation of small memory partitions called frames into which disk pages are loaded. The main task of the MMU is to translate logical addresses (of processes) to the corresponding physical addresses. Given a process that has a logical address of 12242, and addressable disk space of 16MB and addressable RAM space of 1MB; answer the following questions:

Assume that each page is 1KB, how many bits of the logical address will be used to point to the processs page table? ________________

How many frames would be available in RAM? _____________

Assuming there are 8 frames that are frequently used and the MMU supports a set of associative registers or lookaside buffer, sketch a full diagram to illustrate how the MMU performs its logical-to-physical address translation given a logical address of 12242, page size of 1KB, and an allocation of frame number 200 for this page.