Note: This task can be solved without simulating the given SystemVerilog code.

A good friend of yours works for $$ENCRYPTO Hardware Labs Inc.$$ on a top secret, new encryption method that is now to be implemented in hardware. Now you want to find out what kind of secret encryption was being worked on and what exactly the hardware should look like. Since you have already taken part in one or two hacking contests yourself, you managed to get part of the SystemVerilog description from your friend

to pick up$.$ The SystemVerilog description of the secret encryption method can be found in the secret.sv file.

Important: The given $$encryption method$$ is only for teaching purposes in this task and is in no way a cryptographically secure or remotely relevant encryption! Never roll your own crypto!

a$)$ Design a logic circuit of the round module. For this purpose, only use basic gates $($AND$,$ OR$,$ NAND, AND$3,$ XOR, NOT, $...).$ It is not allowed to provide only a circuit diagram automatically generated by synthesis. For example, in the circuit you can write M$1$ for bit M$[1].$

b$)$ Complete the logical circuit of the encrypton module shown below for the parameter N $=3.$ For instantiations of the round submodule, use the following box notation $($the labels within the box correspond to the internal names of round inputs and outputs$)$:

It may make sense to approach the task as follows:

$$ Insert parameters and calculate all expressions specifically.

$$ Go through each iteration of the for loop and understand which logic values flow where. Pay particular attention to which parts of R are set where and read where.

$-$Understand what the inputs and outputs are set to$.$

$$ Draw circuit using previously acquired knowledgemotis rent $?$

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