October 10th, 2017 Name: Class #: Grade: /100 3. (15 pts) Several researchers have suggested that adding a register-memory addressing mode to a load- store machine might be useful. The idea is to replace sequences of LOAD ADD R1, 0(R3) R2, R2, RI by ADD R2, 0(R3) Assume the new instruction will cause the clock to increase by 10%. (Assume that the new instruction affects only the clock cycle and not the CPI). For a benchmark program with 25.1% LOAD instructions on the load-store machine, what percentage of the loads must be eliminated for the machine with the new instruction to have at least the same performance