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Part - 3 : Description In this part of the lab, you will create a data path for the ALU you build in Part -
Part: Description
In this part of the lab, you will create a data path for the ALU you build in Part This data path will consist of registers.
In this lab, we are using the register components. Refer to playwithRegister.dig to get a good starting idea of how this component works.
You will need to address register via the interface select signals to determine which bit register to write the input value to Then using the DFlipflops in Digital.
You will use only one Clock Input to keep the circuit synchronized. That is with Clock set up your register write values. Once the values are set up set Clock to For this lab, a manual setting of clock signal from to is needed. Do not create a periodic clock signal.
Part: User Interface
You are provided an interface file labpartdig, start Part from this file. You are not permitted to edit the content inside the dotted lines rectangles.
Figure: labpartdig Interface
Part: Example
In this design, the user can choose out of the registers where to store the bit value which needs to be rotated inA from part and also which register to store the rotation amount inB from part using the selwrite register selection inputs. The user ensures they direct these two registers to the correct Register Selection: Read From values for inA
and inB inputs values to the ALU.
In the figure above, we have written the value to Register and the value to Register Then, we read from Register the value to ALU input A and read from Register the value to ALU input B Rotating left by b it results in displayed in the ALU Output as hexadecimal A
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