pipeline with four stages: fetch instruction (FI), decode instruction and calculate addresses (DA), fetch FO), and execute (EX). a. Draw a diagram similar to figure below for a sequence of 7 instructions, in which the third instruction (instruction 3 in the figure below ) is a branch that is taken to fifteenth instruction (Instruction 15 in the figure below) and in which there are no data dependencies. b. Now, assume that branch is not taken in the third instruction and so first 7 instructions are executed sequentially. Compute the total number of clock cycles required for executing 7 instructions using this four-stage pipelined machine