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In a hypothetical computer, the processor has four registers: an 8-bit Program Counter (PC), a 16-bit Accumulator (AC), a 16-bit Counter (CTR), and a
In a hypothetical computer, the processor has four registers: an 8-bit Program Counter (PC), a 16-bit Accumulator (AC), a 16-bit Counter (CTR), and a 12-bit Pointer (PTR). The memory is divided into words each of which is 16-bit long. Each word can hold either an instruction or a piece of data. For each instruction X, the four most significant bits (denoted by X15-12) represent an opcode. The rest of the instruction (denoted by X11-0) can be either an address or a value of an operand. The table below explains some of the instructions supported by the processor. Opcode (binary) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 Operation Load AC from a memory location whose address is X1-1-0. Store AC into a memory location whose address is X11-0. Add to AC the contents of a memory location whose address is the value of PTR. The result is saved to AC. 1100 Subtract from AC the contents of a memory location whose address is the value of PTR. The result is saved to AC. Multiply AC times X10. The result is saved to AC. Divide AC by X11-0. The result is saved to AC. Reset AC. Load PTR with X11-0. Increment PTR (by one). Load CTR with X11-0. Decrement CTR (by one). If CTR is not 0, branch to an instruction whose address is X70 (i.e., load PC with X7-0), else continue normally (i.e., do not change PC). Halt execution. Given the following program: Address (Hexadecimal) 05D 05E 05F 060 061 062 063 064 065 066 Contents (Hexadecimal) 03BE 73BF 9002 2FFF 8000 A333 BF60 5003 15D3 CFFF Show, using the table below, the execution trace of that program by filling in the contents of every register and memory location after the fetch cycle and after the execute cycle of every instruction. All values are in hexadecimal. Instruction Cycle PC AC CTR PTR Initially 5D B300 F43A 0C8 03BE Fetch SE B300 F43A OC8 Execute 5E 0007 F43A OC8 Fetch Execute 73BF CFFF Fetch Execute *** VAL *** *** *** *** .... *** *** Location: 3BE 0007 0007 0007 ..... ... Location: Location: Location: 3C0 3BF 5D3 000A FFFF 000A FFFF 000A FFFF +44 0001 0001 0001 *** 44* ... *** (a) PC is 8-bit long. Thus, the maximum program length is 2 = 256 instructions. (b) Execution trace of the given program: Instruction Cycle PC AC CTR PTR Location: Location: Location: Location: 6DE 6DF 6E0 A5B Initially 0014 000A 0005 FFFF 9B C350 F3A 0D9 Fetch 9C C350 F3A OD9 Execute 9C 0014 F3A 0D9 0014 000A 0005 06DE FFFF 0014 000A 0005 FFFF Fetch 9D 0014 F3A 0D9 0014 000A 0005 FFFF 76DF Execute 9D 0014 F3A 6DE 0014 000A 0005 FFFF 000A FFFF Fetch OF 0014 F3A 6DF 0014 Execute 9E 0014 002 6DF FFFF 0014 Fetch 9F 0014 002 6DF 0014 Execute 9F 0008 002 6DF FFFF 0014 FFFF 0014 0014 Fetch A000C8 002 6DF Execute A0 00C8 002 GEO Fetch A 00C8 002 6E0 Execute A1 00C8 001 6E0 0014 0014 6E0 0014 Fetch A2 00C8 001 Execute 900C8 001 6E0 0014 6E0 0014 Fetch 9F 00C8 001 Execute 9F 001 6E0 0014 03E8 001 6E0 0014 03E8 001 GET 0014 Fetch Execute A0 Fetch Execute Al 03E8 03E8 001 6E1 0014 0014 0014 000 6E1 Fetch A2 03E8 000 6E1 Execute A2 03E8 000 6E1 0014 Fetch A3 03E8 000 6E1 0014 Execute A3000A 000 6E1 Fetch 000A 000 6E1 0014 Execute A4 000A 000 6E1 Fetch 0014 0014 000A 000 6E1 0014 Execute A5 000A 000 6E1 0014 9002 41A3 8727 A545 BF9E 41A3 8727 A545 BF9E 5003 1A5B CCD3 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 000A 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 0005 FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF DODA 000A 000A
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Lets break down the execution trace for the given program using the opcode definitions provided Initially PC 5D AC B300 CTR F43A PTR 0C8 Location 3BE 0007 Location 3BF 000A Location 3C0 0001 Location ...Get Instant Access to Expert-Tailored Solutions
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