Please do #2 and briefly explain your answer. thanks

Homework #4 Problem 1: Given the following code: lw Sto, 0(Sso) add St0, ?to, ?t1 1. Identify all of the data dependencies in the code lw $10, 0($50) # this loads a word from data from memory address of $50 lw $t1 , 0($s1 ) # this loads a word from data from memory address of $s1 sw $10, 0($s0) # this stores register value $to in data in memory address given by $s0 2. Execute the code on a pipelined computer by filling in the slots of a table similar tothe following one, where each row represents an instruction and each column represents a clock cycle. Assuming forwarding is not available, insert stalls where they are necessary and calculate the total clock cycles. 5 6 7 8 Instruction 12 3 lw $tO, 0(Ss0) lw St1, 0(Ss1) 4 IF | ID | EX | MEM | WB IF | ID | EX | MEM | WB Homework #4 Problem 1: Given the following code: lw Sto, 0(Sso) add St0, ?to, ?t1 1. Identify all of the data dependencies in the code lw $10, 0($50) # this loads a word from data from memory address of $50 lw $t1 , 0($s1 ) # this loads a word from data from memory address of $s1 sw $10, 0($s0) # this stores register value $to in data in memory address given by $s0 2. Execute the code on a pipelined computer by filling in the slots of a table similar tothe following one, where each row represents an instruction and each column represents a clock cycle. Assuming forwarding is not available, insert stalls where they are necessary and calculate the total clock cycles. 5 6 7 8 Instruction 12 3 lw $tO, 0(Ss0) lw St1, 0(Ss1) 4 IF | ID | EX | MEM | WB IF | ID | EX | MEM | WB