please do part 4 and 5 urgently

pipeline

PIPELIN DATAP 3 For the instructions sequence below: SUB R1, R2, R1 LW R2,0 (R1) SW R2,16 (R1) LW R1,4 (R1) AND R5, R1, R2 i) Find all the dependencies in this sequence Find all the hazards in a five stage pipelined processor WITH and then WITHOUT Forwarding. iii) Consider the latencies from the previous question, and assume it's a full pipeline (no filling and emptying), calculate the total time it will take to execute these instructions iv) To reduce the clock cycle time, we split the MEM Stage into two stages. Repeat (ii) with this six stage pipeline R2 RO L R1 M R3 o N v) With above values: Which is the first value to be forwarded and which value it overrides