Please draw a pipeline diagram

The following code adds integers in two arrays (whose address is in $s0 and $s1) and stores the results back into the first array. $s2 is initialized to 0. $s3 is 25 11: lw t0, (Ss0) 12:lw St1, (Ss1) 13: add $t0, t0, $t1 14: sw to, (Ss0) 15: addi Ss0, $s0, 4 16: addi Ss1, $s1, 4 17: addi St3, St3, 1 18: bne St3, Ss3, 11 19 Assume a MIPS processor with a 5-stage pipeline. Branches are not delayed. For each of the following implementations of MIPS, show the pipeline diagram from the IF stage of 11 to the IF stage of 11 in the next iteration. You are not required to list but you should know which forwarding path is used and when. a. This implementation does not have any forwarding paths. The conditional branch is resolved in the MEM stage and the correct instruction is fetched in the WB stage of the branch instruction. The pipeline stalls before the conditional branch is resolved