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Objectiv: To simulate reading and writing to a custom-sized direct-mapped cache, involving a custom-sized main memory. Inputs: The total size of accessible main memory (in words) The total size of the cache (in words) The block size (words/block) A signal to read (r) or write (w) to the cache The main memory address to read from/write to The contents of the address for writing to the cache Outputs: The corresponding cache tag, block, and word for a main memory address The contents of the address resulting from reading/writing to the cache A message indicating either a hit or a miss to the cache Specification: The program simulates reading from and writing to a cache based on choosing from a menu of choices, where each choice calls the appropriate procedure, where the choices are a) Enter parameters b) Access cache for reading/writing and transfer data c) Quit program Notes: Use a structure (struct) to represent a cache line consisting of a tag (integer) and a block (integer pointer). Define the cache to be a pointer to the struct Upon entering the parameters, the main memory and cache are to be dynamically allocated based on their respective total sizes. Each word i of main memory is initialized with the value M-i, where M is the size of main memory in words. For example, if the memory size is 16384, then word 10 will initially contain the value 16374 (which is 16384-10). .Reading/writing from/to a new block in the cache results in dynamically allocating the block based on the block size. Objectiv: To simulate reading and writing to a custom-sized direct-mapped cache, involving a custom-sized main memory. Inputs: The total size of accessible main memory (in words) The total size of the cache (in words) The block size (words/block) A signal to read (r) or write (w) to the cache The main memory address to read from/write to The contents of the address for writing to the cache Outputs: The corresponding cache tag, block, and word for a main memory address The contents of the address resulting from reading/writing to the cache A message indicating either a hit or a miss to the cache Specification: The program simulates reading from and writing to a cache based on choosing from a menu of choices, where each choice calls the appropriate procedure, where the choices are a) Enter parameters b) Access cache for reading/writing and transfer data c) Quit program Notes: Use a structure (struct) to represent a cache line consisting of a tag (integer) and a block (integer pointer). Define the cache to be a pointer to the struct Upon entering the parameters, the main memory and cache are to be dynamically allocated based on their respective total sizes. Each word i of main memory is initialized with the value M-i, where M is the size of main memory in words. For example, if the memory size is 16384, then word 10 will initially contain the value 16374 (which is 16384-10). .Reading/writing from/to a new block in the cache results in dynamically allocating the block based on the block size
