Please meet all 5 requirements

Functionally, the ROM should have: 1. A parallel Load function using the 8 bit values set in the slide switches 7:0 labeled as D 7:0 in the port list and in the constraint file and pressing the Left button to latch in the data to the ROM 2. A Clear that should zero the contents of 1 byte that is addressed as described below when the Right button is pressed. 3. Address lines to address each of the 32 locations in the "ROM', using the high 5 slide switches, switch 15:11 which are called A 4:0 in the port list and in the constraint file. 4. As the address lines are set, the address should display in the high 5 LED 15:11, called Ao 4:0 in the port list and the constraint file and the contents of the ROM at that address should also display as noted below 5. Whatever address is input, the low 8 leds, LED 7:0 should display the vahue stored in the ROM at the addressed locationl Functionally, the ROM should have: 1. A parallel Load function using the 8 bit values set in the slide switches 7:0 labeled as D 7:0 in the port list and in the constraint file and pressing the Left button to latch in the data to the ROM 2. A Clear that should zero the contents of 1 byte that is addressed as described below when the Right button is pressed. 3. Address lines to address each of the 32 locations in the "ROM', using the high 5 slide switches, switch 15:11 which are called A 4:0 in the port list and in the constraint file. 4. As the address lines are set, the address should display in the high 5 LED 15:11, called Ao 4:0 in the port list and the constraint file and the contents of the ROM at that address should also display as noted below 5. Whatever address is input, the low 8 leds, LED 7:0 should display the vahue stored in the ROM at the addressed locationl