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PLZ answer questions, especialy question 2 and 4 1. Complete the truth table for the combinational circuit. Note that there are dont care rows. 2.

PLZ answer questions, especialy question 2 and 4

1. Complete the truth table for the combinational circuit. Note that there are dont care rows. 2. Minimize each output function using K-maps and derive the minimized Boolean functions. 3. Implement (that is, draw) the circuit using NAND-NAND logic. 4. Implement the circuit (that is, draw) using a Programmable Logic Array (PLA). The PLA will have four inputs, seven outputs and x product terms. The number x depends upon how many product terms are shared among the seven functions.

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The objective of this exercise is to design a combinational circuit that is used to control a seven- segment display of decimal digits as shown in Figure 1 The block diagram of the circuit is also given (Figure 2). The circuit has four inputs a, b, c, d and seven outputs A, B, C, D, E, F, G. The input to the circuit is a Binary Coded Decimal (BCD) number, that is, abcd 0000 represents decimal 0, 0001 represents decimal 1, 0010 is 2, 0011 is 3, 0100 is 4, 0101 is 5, 0110 is 6, 0111 is 7, 1000 is 8 and 1001 represents 9. The seven output lines, A, B, ..., G, each connected to one of the seven displays. Based on the input, the appropriate segments should "light up" showing the corresponding decimal number. For example, when the input is 0000, the outputs A, B, C, D, E and F are 1, while the output G is 0. Thus the output displays ZERO. (Figure 3) The above reasoning shows you how to write the truth table. The first row is given below: A B C DEFG Figure 1: Seven Segment Display outputs Figure 2: Block Diagram Figure 3: Display of ZERO Here is your task: I. 2. 3. Complete the truth table for the combinational circuit. Note that there are don't care" rows Minimize each output function using K-maps and derive the minimized Boolean functions Implement (that is, draw) the circuit using NAND-NAND logic. Implement the circuit (that is, draw) using a Programmable Logic Array (PLA). The PLA will have four inputs, seven outputs and x product terms. The number x depends upon how many product terms are shared among the seven function:s 4

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