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PROBLEM: Model an N-bit add/subtract unit (ASU) for N=3 as shown in the diagram below. The 3- bit ASU receives a 1-bit subtract control signal sub and two, 3-bit signed two's complement operands X=XzX_X. and Y=yzy_yo. The 3-bit ASU generates a 3-bit signed two's complement result R=r_rr, and a 1-bit signed overflow flag V. * 12 Xiyi *o yo sub XOR XOR XOR Y2 x C3 Cout FAQ Cin W Cout FA, Cin sum C2 Cout FAQ Cin Co sum sum XOR V 12 11 10 If sub=0, the 3-bit ASU performs X+Y. Otherwise, the 3-bit ASU performs X-Y. Note that all possible addition/subtraction results cannot be represented with the 3 bits of R=r2rr, because those results would not fall in the range of possible values that may be represented with a 3-bit signed two's complement representation. If the true value of X+Y does not lie in the range of signed two's complement integer values that may be represented by the 3-bit result R, the 3-bit ASU asserts the signed overflow flag (i.e. V=1) to indicate the value of Ris erroneous (i.e. the value is outside the range of 3-bit signed two's complement integer representation). Otherwise, the true value of X+Y does lie in the range of signed two's complement integer values that may be represented by the 3-bit result R, and therefore, the 3-bit ASU de-asserts the signed overflow flag (i.e. V=0) to indicate the value of R is not erroneous. PRE-LAB Consider the 3-bit ASU diagram in the PROBLEM section of this document. The table below shows several values of ASU inputs. Fill in the empty entries in the table to help you understand the operation of the 3-bit ASU. Recall, operands X=X2X1X. and Y=yzyy, and result R=r2rr. each represent signed two's complement integers. NOTE: The base-10 result R in the table below should represent the signed two's complement value of base-2 result R. Base-10 Operands ASU Function Base-2 Operand X Base-2 Operand Y Base-2 Result R Base-10 Result R Overflow? X2 X1 Y2 y1 yo r2 r1 ro R V ADD sub 0 0 0 0 0 0 1 1 1 1 1 1 1 -3 -1 2 3 -4 -1 -3 -2 3 -4 2 Y 2 -1 3 -3 2 -3 1 -4 1 3 SUB | ||