plz solve with exp

Suppose you have a processor with a base CPI of 1.0, and two caches (L1 and L2). You have the following specifications Clock rate =8GHz Access time to 12 Cache =6ns Access time to Main memory =100ns Miss rate per instruction at the L1 cache is 2.5%. Miss rate per instruction at the L2 cache is 0.5%. A program contains 3000 instructions, 500 of them are memory access instructions. Taking into consideration the stalls on Data cache only, find the total average CPL. a. 1.72 b. 1.21 c. None of them d. 2.71 e. 2.1