PROBLEM 3 (25 PTS) Factorial Computation: The following algorithm computes the factorial of an unsigned number X S- FACTORIAL COMPUTATION 16. f done x: unsigned integer f = 1 if x 0 for i = 1 to x f+ fxi end end return f We want to design a circuit that reads in an unsigned number (x) and generates f = x!. Operation: The circuit reads data in when the s signal (usually a one-cycle pulse) is asserted. When the result is ready, the signal done is asserted. Inputs: x (input data), s (start signal). Outputs: f (factorial), done. We restrict the bitwidth off to 16 bits. As a result, the largest x is 8 (as 8! = 40320). Sketch the circuit: FSM + Datapath components. Specify all the I/Os of the FSM, as well as the signals connecting the FSM and the Datapath components (as in Problem 2). You can use an array multiplier as a component. This multiplier will multiply two values: f and i (as per the algorithm). Note: the multiplication only needs 16 bits (even if the sum of the input bitwidths is greater than 16 bits). Thus, some MSBs will need to be discarded (not a problem since the largest f fits with 16 bits). Feel free to use any other standard component(e.g. counter, register, comparator, busmux). Your circuit should compute any factorials from x=0 to x = 8. Provide the State Diagram (in ASM form) of the FSM