Q$4.$ b$)$ Mr$.$ Ramu wants to design a Combinational circuit know as LT$3$ with thrice umputs and one output. The ciscuit should gencrate $0$ when the binary umput is set to $0,1,2$ and ortput in $1$ otherwise.

c$)$ Covsider a $5-$bit shift register as given pelow obtain the content of the given register at the end of $5^{th}$ ceack pulse. Conoidering all fle flops are reset to zero and dat a input